1. Field of the Invention
The disclosure relates in general to a three-dimensional (3D) flash memory structure and methods of manufacturing and operating the same, and more particularly to a 3D stacked AND-type flash memory structure and methods of manufacturing and operating the same.
2. Description of the Related Art
A nonvolatile semiconductor memory device is typically designed to securely hold data even when power is lost or removed from the memory device. Various types of nonvolatile memory devices have been proposed in the related art. Also, manufactures have been looking for new developments or techniques combination for stacking multiple planes of memory cells, so as to achieve greater storage capacity. For example, several types of multi-layer stackable thin-film transistor (TFT) NAND-type flash memory structures have been proposed.
However, the processes for manufacturing those three-dimensional NAND-type flash memory structures require several critical lithography steps for each memory layer, which is time-consuming and expansive. Although the benefits of higher density are achieved using 3D arrays, the expansive costs limit the staked layers of the 3D flash memory structures.
Also, the MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) of the three-dimensional NAND-type flash memory structure are serially connected, and has significantly effects on the read latency.
It is desirable to develop a three-dimensional flash memory structure with larger number of multiple planes being stacked to achieve greater storage capacity, reliable and small memory elements that can be erased and programmed, improved read latency, a low manufacturing cost, and a manufacturing process easy to be carried out.